关注 Intel AI 加速器、OpenVINO 与工作站生态。
test-llama-archs : generate dummy test vocab (#29084) Assisted-by: pi:llama.cpp/DeepSeek-V4-Flash-Vision-Exp **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://github.com/ggml-org/llama.cpp/releases/download/b11049/llama-
metal : support qwen4exp hc ops (#29000) Add support for the new DSV4 HC op variants used by qwen4exp: - hc_pre with per-element sigmoid gate (gated variant) - hc_post with identity mixing (comb == nullptr) Assisted-by: pi:llama.cpp/Qwen3.8-27B **Website:** -
cuda : fix CUB argsort corruption caused by in-place keys (#28389) argsort_f32_i32_cuda_cub called the one-shot DeviceRadixSort::SortPairs API with d_keys_in == d_keys_out (temp_keys, temp_keys). CUB's internal double-buffer ping-pong requires distinct key buf
opencl: add support for bin kernel `flash_attn_f32_f16_bin` (#29046) * opencl: add `flash_attn_f32_f16_bin` * opencl: guarded prefill fa **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://github.com/ggml-org/llama.cpp/rel
hexagon: add ROLL op support (#29105) **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://github.com/ggml-org/llama.cpp/releases/download/b11045/llama-b11045-bin-macos-arm64.tar.gz) - macOS Apple Silicon (arm64, KleidiAI e
hexagon: im2col update (#29103) * ggml-hexagon: accept 1D and padded IM2COL ops * ggml-hexagon: make pure-DDR IM2COL kernel is_2D-aware * ggml-hexagon: extend IM2COL DMA patch-embed fast path to 1D * ggml-hexagon: add blocked-staging general IM2COL DMA kernel
hexagon: HMX flash-attention head_dim padding (support DK=DV=72) (#26539) Allow HMX flash-attention to run with head_dim not a multiple of 64 (e.g. SigLIP head_dim=72), by operating on DK/DV rounded up to 64 with zero-filled tail lanes. **Website:** - **Attest
Over the past two weeks, we've seen an uptick in leaks and rumors about Intel's upcoming Nova Lake CPUs. Here, we piece together what we've heard to try and establish a plausible release timeline. <p>Jake Roach has been bending pins and busting solder joints s
opencl: add bin kernel `kernel_gemm_noshuffle_q6_k_f32_32b_trans_ila_a8_bin` (#28678) * opencl: add A8 Q6_K non-MoE binary kernel * opencl: fix layout compatibility **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://githu
ggml : check for allocation failures to prevent crashes (#28149) * ggml : check for allocation failures to prevent crashes * wording **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://github.com/ggml-org/llama.cpp/release
Model-Saver: Write the SWA pattern, 15 more architectures roundtrip (#29042) * llama: read the SWA pattern as a period or a per-layer array Add llama_model_base::load_swa_pattern(), which reads sliding_window_pattern either as one flag per layer or as a period
Control Resonant's warped Manhattan cityscape pushes graphics cards to the max thanks to path-traced lighting effects and full support for Nvidia's DLSS 4.5 technologies. We put it to the test to see how it performs on 28 graphics cards from Nvidia, AMD, and I
Using AI tools, a new developer has managed to get DLSS 5 neural rendering running on Intel Lunar Lake's integrated Arc graphics, albeit with abysmal performance. <p>Zak Killian is a freelance contributor to Tom's Hardware who has also written for HotHardware
ggml-webgpu: fix supports_op condition for GET_ROWS (#28978) * fix get_rows vec4 handling * Add src strides checking to vec4_aligned of get_rows and the new test case. **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://gi
ggml : handle graph buffer reservation failure (#26070) **Website:** - **Attestations:** - **macOS/iOS:** - [macOS Apple Silicon (arm64)](https://github.com/ggml-org/llama.cpp/releases/download/b11036/llama-b11036-bin-macos-arm64.tar.gz) - macOS Apple Silicon
vulkan: add IQ3_S MMQ matmul kernels (#28822) * vulkan: add IQ3_S MMQ matmul kernels * Make block_a_to_shmem do 2-byte loads (110 bytes is divisible by 2) * Align the check, IQ3_S is also using K tile size **Website:** - **Attestations:** - **macOS/iOS:** - [m
### Summary of major features and improvements * #### More GenAI coverage and framework integrations to minimize code changes * New models supported: * On CPU: Gemma-3n * On CPU, GPU: Kokoro-82M, Qwen3-VL-4B with EAGLE-3, Qwen3-ASR, Muse Glimmer 30B, Qwen3.8 2
Save $270 on this MSI gaming PC with a Intel Core i5-14400F, Nvidia GeForce RTX 5060, 32GB DDR5 and a 2TB SSD, all for $1,429. <p>Ben Stockton is a deals writer at Tom’s Hardware. Previously a hardware writer at PCGamesN, Ben’s been writing about Windows and P
Sources say SK hynix and Intel are in talks to start HBM manufacturing in the United States. Both companies refused to confirm the rumors, though, as SK hynix could potentially be put in a precarious position as trade talks between Seoul and Washington continu
# PyTorch 2.14.0 Release Notes - [Highlights](#highlights) - [Backwards Incompatible Changes](#backwards-incompatible-changes) - [Deprecations](#deprecations) - [New Features](#new-features) - [Improvements](#improvements) - [Bug fixes](#bug-fixes) - [Performa
### Summary of major features and improvements * Functionally enabled Muse-Glimmer-30B model: * Model card and IR available: [OpenVINO/Muse-Glimmer-30B-int4-ov · Hugging Face](https://huggingface.co/OpenVINO/Muse-Glimmer-30B-int4-ov) * Notebooks to try: * [Mus
### Summary of major features and improvements * #### More GenAI coverage and framework integrations to minimize code changes * New models supported: * On CPU, GPU, and NPU: SmolLM3-3B, LFM2-1.2B, LFM2.5-1.2B * On CPU and GPU: Harrier OSS-v1-0.6B, Qwen3-8B wit
# PyTorch 2.13.0 Release Notes - [Highlights](#highlights) - [Backwards Incompatible Changes](#backwards-incompatible-changes) - [Deprecations](#deprecations) - [New Features](#new-features) - [Improvements](#improvements) - [Bug fixes](#bug-fixes) - [Performa
# Summary of improvements * Fixed issue ID 187077: YOLO26 fails to compile on GPU * Resolved an issue in NPU plugin with shared L0 command queue causing violation of app/inference priorities You can find OpenVINO™ toolkit 2026.2.1 release here: * [Download arc
### Summary of major features and improvements * #### More GenAI coverage and framework integrations to minimize code changes * New models supported: Gemma 4 E2B and Gemma 4 E4B * Only on CPUs & GPUs: Qwen3-Coder-Next, Qwen3.5, Qwen3.6, Trinity-mini, LFM2-24B-
Details: item1 ... Tickets: ticket-id AI Assistance: AI assistance used: no / yes If yes, summarize how AI was used and what human validation was performed (build/tests/manual checks).
### Summary of major features and improvements * #### More GenAI coverage and framework integrations to minimize code changes * New models supported on CPUs & GPUs: Qwen3 VL * New models supported on CPUs: GPT-OSS 120B * Preview: Introducing the OpenVINO backe
Details: Cherry pick a bug fixing from master branch commit ID: 2f0404d Tickets: CVS-184283 AI Assistance: AI assistance used: yes If yes, summarize how AI was used and what human validation was performed (build/tests/manual checks). Use the github agent to ch
Automated product version bump to 2026.0.2.
### Summary of major features and improvements * #### More GenAI coverage and framework integrations to minimize code changes * New models supported on CPUs & GPUs: GPT-OSS-20B, MiniCPM-V-4_5-8B, and MiniCPM-o-2.6 * New models supported on NPUs: MiniCPM-o-2.6
